Design of Carry Select Adder using BEC and Common Boolean Logic

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Published: Jul 31, 2024
DOI: https://doi.org/10.54105/ijvlsid.C1205.031322
Keywords:
SQRT, CSLA, BEC, CBL

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Syed Mustafaa M
Department of Electronics and Communications Engineering, Aalim Muhammed Salegh College of Engineering, Chennai, India.
Sathish M
Department of Electronics and Communications Engineering, Aalim Muhammed Salegh College of Engineering, Chennai, India.
Nivedha S
Department of Electronics and Communications Engineering, Aalim Muhammed Salegh College of Engineering, Chennai, India.
Magribatul Noora A K
Department of Electronics and Communications Engineering, Aalim Muhammed Salegh College of Engineering, Chennai, India
Safrin Sifana T
Department of Electronics and Communications Engineering, Aalim Muhammed Salegh College of Engineering, Chennai, India.

Abstract

Carry Select Adder (CSLA) is known to be the fastest adder among the conventional adder structure, which uses multiple narrow adders. CSLA has a great scope of reducing area, power consumption, speed and delay. From the structure of regular CSLA using RCA, it consumes large area and power. This proposed work uses a simple and dynamic Gate Level Implementation which reduces the area, delay, power and speed of the regular CSLA. Based on a modified CSLA using BEC the implementation of 8-b, 16-b, 32-b square root CSLA (SQRT CSLA) architecture have been developed. In order to reduce the area and power consumption in a great way we proposed a design using binary to excess 1 converter (BEC). This paper proposes an dynamic method which replaces a BEC using Common Boolean Logic.

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How to Cite
[1]
Syed Mustafaa M, Sathish M, Nivedha S, Magribatul Noora A K, and Safrin Sifana T , Trans., “Design of Carry Select Adder using BEC and Common Boolean Logic”, IJVLSID, vol. 2, no. 1, pp. 5–9, Jul. 2024, doi: 10.54105/ijvlsid.C1205.031322.
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Vol. 2 No. 1 (2022): Volume-2 Issue-1, March 2022
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How to Cite

[1]
Syed Mustafaa M, Sathish M, Nivedha S, Magribatul Noora A K, and Safrin Sifana T , Trans., “Design of Carry Select Adder using BEC and Common Boolean Logic”, IJVLSID, vol. 2, no. 1, pp. 5–9, Jul. 2024, doi: 10.54105/ijvlsid.C1205.031322.
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